Datasheet

Section 8 EXDMA Controller (EXDMAC)
R01UH0310EJ0500 Rev. 5.00 Page 433 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
If the EDA bit in EDMDR is set to 1 during interrupt generation, transfer is resumed. Figure 8.9
illustrates the operation of the repeat area function.
External memory
Repeated
Repeat area overflow
interrupt can be
requested
Range of
EDSAR values
H'23FFFE
H'23FFFF
H'240000
H'240001
H'240002
H'240003
H'240004
H'240005
H'240006
H'240007
H'240008
H'240009
H'240000
H'240001
H'240002
H'240003
H'240004
H'240005
H'240006
H'240007
:
:
When lower 3 bits (8-byte area) of EDSAR are designated as repeat area
(SARA4 to SARA0 = 3)
Figure 8.9 Example of Repeat Area Function Operation
Caution is required when the repeat area overflow interrupt function is used together with block
transfer mode. If transfer is always terminated when repeat area overflow occurs in block transfer
mode, the block size must be a power of two, or alternatively, the address register value must be
set so that the end of a block coincides with the end of the repeat area range.