Datasheet

Section 1 Overview
R01UH0310EJ0500 Rev. 5.00 Page 5 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
Type
Module/
Function Description
Clock Clock pulse
generator
(CPG)
• This LSI has a single on-chip clock pulse generator circuit
• Consists of an oscillator, a system-clock PLL circuit, a divider, and
the system clock frequency can be changed
System clock (φ) cycle: 8 to 33 MHz
• Six power-down modes
Divided clock mode, sleep mode, module stop function, all module
clock stop mode, software standby mode, and hardware standby
mode
A/D
converter
A/D
converter
(ADC)
• Two units
• 10-bit resolution
• Number of input channels
H8S/2426 Group and H8S/2426R Group: 16 channels
⎯ Unit 0: 8 channels
⎯ Unit 1: 8 channels
H8S/2424 Group: 10 channels
⎯ Unit 0: 8 channels
⎯ Unit 1: 2 channels
• Sample and hold functionality
• Conversion time:
3-V version: 4.0 μs per channel (when A/D conversion clock is set
to 10 MHz)
5-V version: 2.5 μs per channel (when A/D conversion clock is set
to 16 MHz)
• Two kinds of operating modes (single mode and scan mode)
• Three types of A/D conversion start (software, trigger by timer (TPU
or TMR), or external trigger)
D/A
converter
D/A
converter
(DAC)
• Resolution (8 bits) × Number of output channels (2 channels)
• Conversion time: Maximum 10 μs (with 20-pF load)
• Output voltage: 0 V to Vref