Datasheet

Page xxiv of xxx
Section 16 I
2
C Bus Interface 2 (IIC2)................................................................ 955
16.1 Features.............................................................................................................................. 955
16.2 Input/Output Pins...............................................................................................................957
16.3 Register Descriptions......................................................................................................... 958
16.3.1 I
2
C Bus Control Register A (ICCRA) ................................................................... 960
16.3.2 I
2
C Bus Control Register B (ICCRB) ................................................................... 962
16.3.3 I
2
C Bus Mode Register (ICMR)............................................................................ 963
16.3.4 I
2
C Bus Interrupt Enable Register (ICIER)........................................................... 965
16.3.5 I
2
C Bus Status Register (ICSR)............................................................................. 967
16.3.6 Slave Address Register (SAR).............................................................................. 969
16.3.7 I
2
C Bus Transmit Data Register (ICDRT) ............................................................ 970
16.3.8 I
2
C Bus Receive Data Register (ICDRR).............................................................. 970
16.3.9 I
2
C Bus Shift Register (ICDRS)............................................................................ 970
16.4 Operation ........................................................................................................................... 971
16.4.1 I
2
C Bus Format...................................................................................................... 971
16.4.2 Master Transmit Operation................................................................................... 972
16.4.3 Master Receive Operation .................................................................................... 974
16.4.4 Slave Transmit Operation ..................................................................................... 976
16.4.5 Slave Receive Operation....................................................................................... 979
16.4.6 Noise Canceler...................................................................................................... 981
16.4.7 Example of Use..................................................................................................... 981
16.5 Interrupt Request................................................................................................................ 986
16.6 Bit Synchronous Circuit..................................................................................................... 987
16.7 Usage Notes ....................................................................................................................... 988
Section 17 A/D Converter ................................................................................. 991
17.1 Features.............................................................................................................................. 991
17.2 Input/Output Pins...............................................................................................................994
17.3 Register Descriptions......................................................................................................... 996
17.3.1 A/D Data Registers A to H (ADDRA to ADDRH) .............................................. 997
17.3.2 A/D Control/Status Register for Unit 0 (ADCSR_0)............................................ 999
17.3.3 A/D Control/Status Register for Unit 1 (ADCSR_1).......................................... 1001
17.3.4 A/D Control Register (ADCR_0) Unit 0 ............................................................ 1004
17.3.5 A/D Control Register (ADCR_1) Unit 1 ............................................................ 1006
17.4 Operation ......................................................................................................................... 1008
17.4.1 Single Mode........................................................................................................ 1008
17.4.2 Scan Mode .......................................................................................................... 1010
17.4.3 Input Sampling and A/D Conversion Time ........................................................ 1014
17.4.4 External Trigger Input Timing............................................................................ 1016