Datasheet
Page xxii of xxx 
13.8.6  Mode Setting with Cascaded Connection ............................................................. 851 
13.8.7  Module Stop Function Setting .............................................................................. 851 
13.8.8  Interrupts in Module Stop State ............................................................................ 851 
Section 14 Watchdog Timer (WDT) .................................................................853 
14.1  Features.............................................................................................................................. 853 
14.2  Input/Output Pin ................................................................................................................854 
14.3  Register Descriptions......................................................................................................... 855 
14.3.1  Timer Counter (TCNT)......................................................................................... 855 
14.3.2  Timer Control/Status Register (TCSR)................................................................. 855 
14.3.3  Reset Control/Status Register (RSTCSR)............................................................. 857 
14.4  Operation ........................................................................................................................... 858 
14.4.1  Watchdog Timer Mode......................................................................................... 858 
14.4.2  Interval Timer Mode............................................................................................. 860 
14.5  Interrupt Source ................................................................................................................. 860 
14.6  Usage Notes ....................................................................................................................... 861 
14.6.1  Notes on Register Access ..................................................................................... 861 
14.6.2  Contention between Timer Counter (TCNT) Write and Increment ...................... 863 
14.6.3  Changing Value of CKS2 to CKS0 ...................................................................... 863 
14.6.4  Switching between Watchdog Timer Mode and Interval Timer Mode................. 863 
14.6.5  Internal Reset in Watchdog Timer Mode.............................................................. 864 
14.6.6  System Reset by WDTOVF Signal....................................................................... 864 
Section 15 Serial Communication Interface (SCI, IrDA) .................................865 
15.1  Features.............................................................................................................................. 865 
15.2  Input/Output Pins...............................................................................................................868 
15.3  Register Descriptions......................................................................................................... 869 
15.3.1  Receive Shift Register (RSR) ............................................................................... 870 
15.3.2  Receive Data Register (RDR)............................................................................... 870 
15.3.3  Transmit Data Register (TDR).............................................................................. 871 
15.3.4  Transmit Shift Register (TSR).............................................................................. 871 
15.3.5  Serial Mode Register (SMR) ................................................................................ 871 
15.3.6  Serial Control Register (SCR) .............................................................................. 875 
15.3.7  Serial Status Register (SSR) ................................................................................. 880 
15.3.8  Smart Card Mode Register (SCMR)..................................................................... 888 
15.3.9  Bit Rate Register (BRR) ....................................................................................... 889 
15.3.10 IrDA Control Register (IrCR)............................................................................... 897 
15.3.11 Serial Extension Mode Register (SEMR) ............................................................. 898 
15.4  Operation in Asynchronous Mode ..................................................................................... 900 
15.4.1  Data Transfer Format............................................................................................ 900 










