Section 6 Bus Controller (BSC)
Page 164 of 1384 R01UH0310EJ0500 Rev. 5.00
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
Bus cycle
T
1
T
2
RD
φ
Data
RD
Data
RDNn = 0
RDNn = 1
T
3
Figure 6.2 Read Strobe Negation Timing (Example of 3-State Access Space)
