Datasheet

Section 5 Interrupt Controller
R01UH0310EJ0500 Rev. 5.00 Page 141 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
5.6.3 Interrupt Exception Handling Sequence
Figure 5.5 shows the interrupt exception handling sequence. The example shown is for the case
where interrupt control mode 0 is set in advanced mode, and the program area and stack area are
in on-chip memory.