Datasheet

Section 5 Interrupt Controller
Page 114 of 1384 R01UH0310EJ0500 Rev. 5.00
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
5.3.3 IRQ Enable Register (IER)
IER controls enabling and disabling of interrupt requests IRQ15 to IRQ0.
Bit Bit Name Initial Value R/W Description
15 IRQ15E 0 R/W IRQ15 Enable*
The IRQ15 interrupt request is enabled when this
bit is 1.
14 IRQ14E 0 R/W IRQ14 Enable*
The IRQ14 interrupt request is enabled when this
bit is 1.
13 IRQ13E 0 R/W IRQ13 Enable*
The IRQ13 interrupt request is enabled when this
bit is 1.
12 IRQ12E 0 R/W IRQ12 Enable*
The IRQ12 interrupt request is enabled when this
bit is 1.
11 IRQ11E 0 R/W IRQ11 Enable*
The IRQ11 interrupt request is enabled when this
bit is 1.
10 IRQ10E 0 R/W IRQ10 Enable*
The IRQ10 interrupt request is enabled when this
bit is 1.
9 IRQ9E 0 R/W IRQ9 Enable*
The IRQ9 interrupt request is enabled when this
bit is 1.
8 IRQ8E 0 R/W IRQ8 Enable*
The IRQ8 interrupt request is enabled when this
bit is 1.
7 IRQ7E 0 R/W IRQ7 Enable
The IRQ7 interrupt request is enabled when this
bit is 1.
6 IRQ6E 0 R/W IRQ6 Enable
The IRQ6 interrupt request is enabled when this
bit is 1.