Datasheet

Appendix
R01UH0310EJ0500 Rev. 5.00 Page 1345 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
Port Name
Pin Name
MCU
Operating
Mode
Reset
Hardware
Standby
Mode
Software Standby
Mode
Bus Release
State
Program
Execution State
Sleep Mode
PH1/CS5/
RAS5*
2
SDRAMφ*
1
1, 2, 3, 4, 7 [H8S/
2426R
Group]
Clock
output
[H8S/
2426
Group]
T
[H8S/2426R
Group]
L
[H8S/2426
Group]
T
[SDPSTP = 0 in
H8S/2426R Group]
L
[SDPSTP = 1 in
H8S/2426R Group,
or H8S/2426
Group,
CS output,
OPE = 0]
T
[SDPSTP = 1 in
H8S/2426R Group,
or H8S/2426
Group,
CS output,
OPE = 1]
H
[Other than the
above]
Keep
[SDPSTP = 0 in
H8S/2426R Group]
Clock output
[SDPSTP = 1 in
H8S/2426R Group,
or H8S/2426
Group,
CS output]
T
[Other than the
above]
Keep
[SDPSTP = 0 in
H8S/2426R Group]
Clock output
[SDPSTP = 1 in
H8S/2426R Group,
or H8S/2426
Group,
CS output]
CS
[Other than the
above]
Keep
PH0/CS4/
RAS4*
2
/
WE*
1
1, 2, 3, 4, 7 T T [CS output,
OPE = 0]
T
[CS output,
OPE = 1]
H
[Other than the
above]
Keep
[CS output]
T
[Other than the
above]
Keep
[CS output]
CS
[Other than the
above]
I/O port
PJ2 1, 2, 3, 4, 7 T T T T Input port
PJ1 to PJ0 1, 2, 3, 4, 7 T T Keep Keep I/O port
WDTOVF 1, 2, 3, 4, 7 H H H H H*
3