Datasheet

Section 25 Electrical Characteristics
R01UH0310EJ0500 Rev. 5.00 Page 1271 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
T
1
φ
A23 to A0
CS7 to CS0
AS
t
DACD1
t
DACD2
t
EDACD1
t
EDACD2
RD
(read)
D15 to D0
(read)
HWR, LWR
(write)
D15 to D0
(write)
DACK0, DACK1
EDACK2, EDACK3
T
2
Figure 25.31 DMAC and EXDMAC Single Address Transfer Timing: Two-State Access