Datasheet
Section 24 List of Registers 
Page 1164 of 1384    R01UH0310EJ0500 Rev. 5.00 
 Sep 25, 2012 
H8S/2426, H8S/2426R, H8S/2424 Group
24.1  Register Addresses (Address Order) 
The data bus width indicates the numbers of bits by which the register is accessed. 
The number of access states indicates the number of states based on the specified reference clock. 
Register Name  Abbreviation 
Number 
of Bits  Address  Module 
Data 
Width 
Access 
States 
DTC mode register A  MRA  8  DTC  16/32  2 
DTC source address register  SAR  24  DTC  16/32  2 
DTC mode register B  MRB  8  DTC  16/32  2 
DTC destination address register  DAR  24  DTC  16/32  2 
DTC transfer count register A  CRA  16  DTC  16/32  2 
DTC transfer count register B  CRB  16 
H'BC00 to 
H'BFFF 
DTC 16/32 2 
RAM module stop control register H  RMMSTPCRH  8  H'FC80  SYSTEM  8  2 
RAM module stop control register L  RMMSTPCRL  8  H'FC81  SYSTEM  8  2 
Interrupt priority register L  IPRL  16  H'FC90  INT  16  2 
Interrupt priority register M  IPRM  16  H'FC92  INT  16  2 
Interrupt priority register N  IPRN  16  H'FC94  INT  16  2 
DTC enable register I  DTCERI  8  H'FC96  DTC  16  2 
DTC control register  DTCCR  8  H'FC98  DTC  16  2 
A/D data register A_1  ADDRA_1  16  H'FCA0  A/D_1  16  2 
A/D data register B_1  ADDRB_1  16  H'FCA2  A/D_1  16  2 
A/D data register C_1  ADDRC_1  16  H'FCA4  A/D_1  16  2 
A/D data register D_1  ADDRD_1  16  H'FCA6  A/D_1  16  2 
A/D data register E_1  ADDRE_1  16  H'FCA8  A/D_1  16  2 
A/D data register F_1  ADDRF_1  16  H'FCAA  A/D_1  16  2 
A/D data register G_1  ADDRG_1  16  H'FCAC  A/D_1  16  2 
A/D data register H_1  ADDRH_1  16  H'FCAE  A/D_1  16  2 
A/D control/status register_1  ADCSR_1  8  H'FCB0  A/D_1  16  2 
A/D control register_1  ADCR_1  8  H'FCB1  A/D_1  16  2 










