Datasheet

Section 19 Synchronous Serial Communication Unit (SSU)
R01UH0310EJ0500 Rev. 5.00 Page 1037 of 1384
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
Section 19 Synchronous Serial Communication Unit (SSU)
This LSI has one channel of synchronous serial communication unit (SSU). The SSU has master
mode in which this LSI outputs clocks as a master device for synchronous serial communication
and slave mode in which clocks are input from an external device for synchronous serial
communication. Synchronous serial communication can be performed with devices having
different clock polarity and clock phase. Figure 19.1 is a block diagram of the SSU.
19.1 Features
• Choice of SSU mode and clock synchronous mode
• Choice of master mode and slave mode
• Choice of standard mode and bidirectional mode
• Synchronous serial communication with devices with different clock polarity and clock phase
• Choice of 8/16/24/32-bit width of transmit/receive data
• Full-duplex communication capability
The shift register is incorporated, enabling transmission and reception to be executed
simultaneously.
• Consecutive serial communication
• Choice of LSB-first or MSB-first transfer
• Choice of a clock source
Seven internal clocks (φ/4, φ/8, φ/16, φ/32, φ/64, φ/128, φ/256) or an external clock
• Five interrupt sources
Transmit-end, transmit-data-register-empty, receive-data-full, overrun-error, and conflict error
• Module stop state can be set.