Datasheet

Section 16 I2C Bus Interface 2 (IIC2)
Page 978 of 1384 R01UH0310EJ0500 Rev. 5.00
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
TDRE
Data n
TEND
ICDRS
ICDRR
19 23456789
TRS
ICDRT
A
SCL
(master output)
SDA
(master output)
SDA
(slave output)
SCL
(slave output)
Bit 7
Slave transmit mode
Slave receive
mode
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
[3] Clear TEND
[5] Clear TDRE
[4] Read ICDRR (dummy read)
after clearing TRS
User
processing
A/A
Figure 16.10 Slave Transmit Mode Operation Timing 2