Datasheet

Section 21 Flash Memory
Page 1098 of 1384 R01UH0310EJ0500 Rev. 5.00
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
21.7 Notes on User Programming Mode
21.7.1 Prohibited Interrupts (EW0 Mode)
The NMI and watchdog timer interrupts can be used because FLMCR1 is forcibly initialized when
an interrupt is generated; specify the destination address of each interrupt routine in the fixed
vector table. Flash memory programming is terminated when an NMI interrupt or a watchdog
timer interrupt occurs. In this case, reexecute the programming program after the interrupt routine
is completed.
21.7.2 Access Method
To set the FMCMDEN bit to 1, be sure to write 0 to the bit and then write 1 in a row. Make sure
that no interrupt, EXDMAC transfer, DTC transfer, or DMA transfer is generated between writing
0 and 1.
21.7.3 Programming (EW0 Mode)
If the power-supply voltage falls during programming of the block that stores the programming
control program, the programming control program cannot be correctly modified and the flash
memory may not be programmed after that. In this case, use the boot mode or programmer mode
instead.
21.7.4 Writing Commands or Data
The address to write a command code or data should be H'0, H'4, H'8, or H'C.
21.7.5 Software Standby Mode
Before entering the stop mode, set the FMCMDEN bit to 0 (CPU programming mode disabled),
disable the DMA transfer, and then make a transition to the software standby mode.