Datasheet

Section 21 Flash Memory
Page 1082 of 1384 R01UH0310EJ0500 Rev. 5.00
Sep 25, 2012
H8S/2426, H8S/2426R, H8S/2424 Group
21.2.2 Flash Memory Data Block Protect Register (FLMDBPR)
Bit Bit Name
Initial
Value R/W Description
7 ⎯ 0 ⎯ Reserved
The initial value should not be changed.
6 ⎯ 0 ⎯ Reserved
The initial value should not be changed.
5 ⎯ 0 ⎯ Reserved
The initial value should not be changed.
4 ⎯ 0 ⎯ Reserved
The initial value should not be changed.
3 ⎯ 0 ⎯ Reserved
The initial value should not be changed.
2 ⎯ 0 ⎯ Reserved
The initial value should not be changed.
1 ⎯ 0 ⎯ Reserved
The initial value should not be changed.
0 FMDBPT0 0 R/W Data Flash E/W Protect*
0: Data flash E/W disabled
1: Data flash E/W enabled
To set this bit to 0, be sure to write 1 and then write 0 in a
row.
Note: * This bit is set to 1 simultaneously when the FMCMDEN bit in FLMCR1 is set to 1. To
set this bit to 1, be sure to write 0 and then write 1 in a row.