Datasheet

Section 22 Power-Down Modes
Rev. 3.00 Sep. 28, 2009 Page 646 of 710
REJ09B0384-0300
22.7 Module Stop Mode
Module stop mode can be individually set for each on-chip peripheral module.
When the corresponding MSTP bit in MSTPCR and SUBMSTP is set to 1, module operation
stops at the end of the bus cycle and a transition is made to module stop mode. In turn, when the
corresponding MSTP bit is cleared to 0, module stop mode is cancelled and the module operation
resumes at the end of the bus cycle. In module stop mode, the internal states of on-chip peripheral
modules other than the PWMX, A/D converter, and part of the SCI are retained.
After the reset state is cancelled, all modules other than DTC are in module stop mode.
While an on-chip peripheral module is in module stop mode, read/write access to its registers is
disabled.