Datasheet

Section 20 Boundary Scan (JTAG)
Rev. 3.00 Sep. 28, 2009 Page 620 of 710
REJ09B0384-0300
(6) IDCODE (Instruction code: B'1110)
When the IDCODE instruction is enabled, the value of the ID code register is output from the
ETDO pin with LSB first when the TAP controller is in the Shift-DR state. While the IDCODE
instruction is being executed, the test circuit does not affect the system circuit.
When the TAP controller is in the Test-Logic-Reset state, the instruction register is initialized to
the IDCODE instruction.
Notes: 1. Boundary scan mode does not cover power-supply-related pins (VCC, VCL, VSS,
AVCC, AVSS, and AVref).
2. Boundary scan mode does not cover clock-related pins (EXTAL, XTAL, and PFSEL).
3. Boundary scan mode does not cover reset- and standby-related pins (RES, STBY, and
RESO).
4. Boundary scan mode does not cover JTAG-related pins (ETCK, ETDI, ETDO, ETMS,
and ETRST).
5. Fix the MD2 pin high.
6. Use the STBY pin in high state.