Datasheet

Section 20 Boundary Scan (JTAG)
Rev. 3.00 Sep. 28, 2009 Page 610 of 710
REJ09B0384-0300
20.3.2 Bypass Register (SDBPR)
SDBPR is a 1-bit shift register. In BYPASS, CLAMP, or HIGHZ mode, SDBPR is connected
between the ETDI and ETDO pins.
20.3.3 Boundary Scan Register (SDBSR)
SDBSR is a shift register provided on the PAD for controlling the I/O pins of this LSI.
Using EXTEST mode or SAMPLE/PRELOAD mode, a boundary scan test conforming to the
IEEE1149.1 standard can be performed.
Table 20.3 shows the relationship between the pins of this LSI and the boundary scan register.