Datasheet

Section 19 Flash Memory
Rev. 3.00 Sep. 28, 2009 Page 551 of 710
REJ09B0384-0300
For the downloaded on-chip program area, refer to the RAM map for programming/erasing in
figure 19.10.
A single divided block is erased by one erasing processing. For block divisions, refer to figure
19.4. To erase two or more blocks, update the erase block number and perform the erasing
processing for each block.
1. Select the on-chip program to be downloaded
Set the EPVB bit in FECS to 1.
Several programming/erasing programs cannot be selected at one time. If several programs are
set, download is not performed and a download error is reported to the SS bit in the DPFR
parameter.
Specify the start address of a download destination by FTDAR.
The procedures to be carried out after setting FKEY, e.g. download and initialization, are the
same as those in the programming procedure. For details, refer to section 19.4.2 (2),
Programming Procedure in User Program Mode.
The procedures after setting parameters for erasing programs are as follows:
2. Set the FEBS parameter necessary for erasure
Set the erase block number of the user MAT in the flash erase block select parameter FEBS
(general register ER0). If a value other than an erase block number of the user MAT is set, no
block is erased even though the erasing program is executed, and an error is returned to the
return value parameter FPFR.
3. Erasure
Similar to as in programming, there is an entry point of the erasing program in the area from
the start address of a download destination specified by FTDAR + 16 bytes of on-chip RAM.
The subroutine is called and erasing is executed by using the following steps.
MOV.L #DLTOP+16,ER2 ; Set entry address to ER2
JSR @ER2 ; Call erasing routine
NOP
• The general registers other than R0L are held in the erasing program.
• R0L is a return value of the FPFR parameter.
• Since the stack area is used in the erasing program, a stack area of 128 bytes at the
maximum must be allocated in RAM.
4. The return value in the erasing program, FPFR (general register R0L) is determined.