Datasheet

Section 19 Flash Memory
Rev. 3.00 Sep. 28, 2009 Page 548 of 710
REJ09B0384-0300
7. Initialization
When a programming program is downloaded, the initialization program is also downloaded to
the on-chip RAM. There is an entry point of the initialization program in the area from the
start address specified by FTDAR + 32 bytes of the on-chip RAM. The subroutine is called
and initialization is executed by using the following steps.
MOV.L #DLTOP+32,ER2 ; Set entry address to ER2
JSR @ER2 ; Call initialization routine
NOP
⎯ The general registers other than R0L are held in the initialization program.
⎯ R0L is a return value of the FPFR parameter.
⎯ Since the stack area is used in the initialization program, 128-byte stack area at the
maximum must be allocated in RAM.
⎯ Interrupts can be accepted during the execution of the initialization program. The program
storage area and stack area in the on-chip RAM and register values must not be destroyed.
8. The return value in the initialization program, FPFR (general register R0L) is determined.
9. All interrupts and the use of a bus master other than the CPU are prohibited.
The specified voltage is applied for the specified time when programming or erasing. If
interrupts occur or the bus mastership is moved to other than the CPU during this time, the
voltage for more than the specified time will be applied and flash memory may be damaged.
Therefore, interrupts and bus mastership to other than the CPU, such as to the DTC, are
prohibited.
To disable interrupts, bit 7 (I) in the condition code register (CCR) of the CPU should be set to
B'1 in interrupt control mode 0 or bits 7 and 6 (I and UI) should be set to B'11 in interrupt
control mode 1. Interrupts other than NMI are held and not executed.
The NMI interrupts must be masked within the user system.
The interrupts that are held must be executed after all program processing.
When the bus mastership is moved to other than the CPU, such as to the DTC, the error
protection state is entered. Therefore, taking bus mastership by the DTC is prohibited.
10. FKEY must be set to H′5A and the user MAT must be prepared for programming.