Datasheet

Section 19 Flash Memory
Rev. 3.00 Sep. 28, 2009 Page 519 of 710
REJ09B0384-0300
19.3.1 Programming/Erasing Interface Register
The programming/erasing interface registers are as described below. They are all 8-bit registers
that can be accessed in byte. These registers are initialized at a reset or in hardware standby mode.
• Flash Code Control Status Register (FCCS)
FCCS is configured by bits which request the monitor of the FWE pin state and error occurrence
during programming or erasing flash memory and the download of on-chip program.
Bit Bit Name
Initial
Value
R/W Description
7 FWE 1/0 R Flash Program Enable
Monitors the signal level input to the FWE pin and
enables or disables programming/erasing flash memory.
0: Programming/erasing disabled
1: Programming/erasing enabled
6, 5 ⎯ All 0 R/W Reserved
The initial value should not be changed.