Datasheet

Section 18 RAM
Rev. 3.00 Sep. 28, 2009 Page 507 of 710
REJ09B0384-0300
Section 18 RAM
This LSI has 40 kbytes of on-chip high-speed static RAM. The RAM is connected to the CPU by a
16-bit data bus, enabling one-state access by the CPU to both byte data and word data.
The on-chip RAM can be enabled or disabled by means of the RAME bit in the system control
register (SYSCR). For details on SYSCR, see section 3.2.2, System Control Register (SYSCR).