Datasheet

Section 17 A/D Converter
Rev. 3.00 Sep. 28, 2009 Page 492 of 710
REJ09B0384-0300
17.3.3 A/D Control Register (ADCR)
The ADCR sets the operation mode of A/D converter and the conversion time.
Bit Bit Name
Initial
Value
R/W Description
7
6
0
TRGS1
TRGS0
EXTRGS
0
0
0
R/W
R/W
R/W
Timer Trigger Select 1 and 0, Extended Trigger Select
Enable starting of A/D conversion by a trigger signal.
These bits should be set while A/D conversion is stopped
(ADSF = 0).
00 0: Disables starting by trigger signals.
10 0: Enables starting by a trigger from TMR_0.
10 1: Enables starting by the ADTRG pin input.
Other than above: Setting prohibited
5
4
SCANE
SCANS
0
0
R/W
R/W
Scan Mode
Select the operation mode of A/D conversion
0x: Single mode
10: Scan mode
(consecutive A/D conversion of channels 1 to 4)
11: Scan mode
(consecutive A/D conversion of channels 1 to 8)
3
2
CKS1
CKS0
0
0
R/W
R/W
Clock Select 1 and 0
Set the A/D conversion time. Setting should be made
while the conversion is stopped (ADST = 0).
00: Setting prohibited
01: Conversion time = 80 states (max)
10: Conversion time = 160 states (max)
11: Setting prohibited
1 ADSTCLR 0 R/W A/D Start Clear
Sets the automatic clearing of the ADST bit in scan mode.
0: Disables the automatic clearing of the ADST bit in scan
mode.
1: Automatically clears the bit when A/D conversion of all
of the selected channels are completed.
[Legend] x: Don't care