Datasheet

Section 17 A/D Converter
Rev. 3.00 Sep. 28, 2009 Page 486 of 710
REJ09B0384-0300
Module data bus
Control circuit
Internal data
bus
10-bit D/A
Comparator
+
Sample-and-hold
circuit
ADI interrupt
signal
A
D
C
S
R
A
D
C
R
A
D
D
R
D
A
D
D
R
C
A
D
D
R
B
A
D
D
R
A
A
D
D
R
H
A
D
D
R
G
A
D
D
R
F
A
D
D
R
E
Successive approximations register
[Legend]
ADCR: A/D control register
ADCSR: A/D control/status register
ADDRA: A/D data register A
ADDRB: A/D data register B
ADDRC: A/D data register C
ADDRD: A/D data register D
ADDRE: A/D data register E
ADDRF: A/D data register F
ADDRG: A/D data register G
ADDRH: A/D data register H
AVCC
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AVref
Multiplexer
Bus interface
AVSS
ADTRG
Conversion start trigger
from TMR_0
Figure 17.1 Block Diagram of the A/D Converter