Datasheet

Section 16 LPC Interface (LPC)
Rev. 3.00 Sep. 28, 2009 Page 482 of 710
REJ09B0384-0300
Slave CPU Master CPU
ODR1 write
Write 1 to IRQ1E1
OBF1 = 0?
Yes
No
No
Yes
All bytes
transferred?
SERIRQ IRQ1 output
SERIRQ IRQ1
source clear
Interrupt initiation
ODR1 read
Hardware operation
Software operation
Figure 16.10 HIRQ Flowchart (Example of Channel 1)