Section 16 LPC Interface (LPC)
Rev. 3.00 Sep. 28, 2009 Page 475 of 710
REJ09B0384-0300
Figure 16.8 shows the timing of the LRESET signals.
LRESET
LAD3 to LAD0
LFRAME
LCLK
At least 30 μs
At least 100 μs
At least 60 μs
Figure 16.8 Power-Down State Termination Timing
