Datasheet

Section 16 LPC Interface (LPC)
Rev. 3.00 Sep. 28, 2009 Page 460 of 710
REJ09B0384-0300
16.3.25 BT Control Register (BTCR)
BTCR is one of the registers used to implement BT mode. The BTCR register contains bits used
in transfer cycle handshaking, and those indicating the completion of data transfer to the buffer.
R/W
Bit Bit Name Initial Value Slave Host Description
7 B_BUSY 1 R/W R BT Write Transfer Busy Flag
Read-only bit from the host. Indicates that the
BTDTR buffer is being used for BT write transfer
(write transfer is in progress.)
0: Indicates waiting for BT write transfer
1: Indicates that the BTDTR buffer is being used
6 H_BUSY 0 R (W)*
3
BT Read Transfer Busy Flag
This is a set/clear bit from the host. Indicates that
the BTDTR buffer is being used for BT read
transfer (read transfer is in progress.)
0: Indicates waiting for BT read transfer
[Clearing condition]
When the host writes a 1 while H_BUSY is set
to 1.
1: Indicates that the BTDTR buffer is being used
[Setting condition]
When the host writes a 1 while H_BUSY is set
to 0.
5 OEM0 0 R/W R/(W)*
4
User Defined Bit
This bit is defined by the user, and validated only
when set to 1 by a 0 written from the host.
0: [Clearing condition]
When the slave writes a 0 after a 1 has been
read from OEM0.
1: [Setting condition]
When the slave writes a 1, after a 0 has been
read from OEM0, or when the host writes a 0.