Datasheet

Section 16 LPC Interface (LPC)
Rev. 3.00 Sep. 28, 2009 Page 459 of 710
REJ09B0384-0300
R/W
Bit Bit Name Initial Value Slave Host Description
5 IRQCRIE 0 R/W ⎯ B2H_IRQ Clear Interrupt Enable
Enables or disables the IRQCRI interrupt which is
an IBFI3 interrupt source to the slave.
0: B2H_IRQ clear interrupt is disabled.
1: B2H_IRQ clear interrupt is enabled.
4 BEVTIE 0 R/W ⎯ BEVT_ATN Clear Interrupt Enable
Enables or disables the BEVTI interrupt which is an
IBFI3 interrupt source to the slave.
0: BEVT_ATN clear interrupt is disabled.
1: BEVT_ATN clear interrupt is enabled.
3 B2HIE 0 R/W ⎯ Read End Interrupt Enable
Enables or disables the B2HI interrupt which is an
IBFI3 interrupt source to the slave.
0: Read end interrupt is disabled.
1: Read end interrupt is enabled.
2 H2BIE 0 R/W ⎯ Write End Interrupt Enable
Enables or disables the H2BI interrupt which is an
IBFI3 interrupt source to the slave.
0: Write end interrupt is disabled.
1: Write end interrupt is enabled.
1 CRRPIE 0 R/W ⎯ Read Pointer Clear Interrupt Enable
Enables or disables the CRRPI interrupt which is an
IBFI3 interrupt source to the slave.
0: Read pointer clear interrupt is disabled.
1: Read pointer clear interrupt is enabled.
0 CRWPIE 0 R/W ⎯ Write Pointer Clear Interrupt Enable
Enables or disables the CRWPI interrupt which is an
IBFI3 interrupt source to the slave.
0: Write pointer clear interrupt is disabled.
1: Write pointer clear interrupt is enabled.