Datasheet

Section 15 I
2
C Bus Interface (IIC)
Rev. 3.00 Sep. 28, 2009 Page 328 of 710
REJ09B0384-0300
⎯ Pins⎯SCL0 to SCL3 and SDA0 to SDA3 ⎯ (normally NMOS push-pull outputs) function
as NMOS open-drain outputs when the bus drive function is selected.
Figure 15.1 shows a block diagram of the I
2
C bus interface. Figure 15.2 shows an example of I/O
pin connections to external circuits. Since I
2
C bus interface I/O pins are different in structure from
normal port pins, they have different specifications for permissible applied voltages. For details,
see section 24, Electrical Characteristics.
SCL
PS ICCR
ICXR
ICMR
ICSR
ICDRS
SAR, SARX
SDA
ICCR:
ICMR:
ICSR:
ICDR:
ICXR:
SAR:
SARX:
PS:
ICDRR
ICDRT
Noise
canceler
Bus state
decision
circuit
Arbitration
decision
circuit
Clock
control
Address comparator
Interrupt
generator
Internal data bus
Output data
control
circuit
Noise
canceler
Interrupt
generator
[Legend]
I
2
C bus control register
I
2
C bus mode register
I
2
C bus status register
I
2
C bus data register
I
2
C bus extended control register
Slave address register
Slave address register X
Prescaler
φ
Figure 15.1 Block Diagram of I
2
C Bus Interface