Datasheet

Section 14 CRC Operation Circuit (CRC)
Rev. 3.00 Sep. 28, 2009 Page 320 of 710
REJ09B0384-0300
14.2 Register Descriptions
The CRC operation circuit has the following registers.
• CRC control register (CRCCR)
• CRC data input register (CRCDIR)
• CRC data output register (CRCDOR)
14.2.1 CRC Control Register (CRCCR)
CRCCR initializes the CRC operation circuit, switches the operation mode, and selects the
generating polynomial.
Bit Bit Name
Initial
Value
R/W Description
7 DORCLR 0 W CRCDOR Clear
Setting this bit to 1 clears CRCDOR to H
'0000.
6 to 3 ⎯ All 0 R Reserved
The initial value should not be changed.
2 LMS 0 R/W CRC Operation Switch
Selects CRC code generation for LSB-first or MSB-first
communication.
0: Performs CRC operation for LSB-first communication.
The lower byte (bits 7 to 0) is first transmitted when
CRCDOR contents (CRC code) are divided into two
bytes to be transmitted in two parts.
1: Performs CRC operation for MSB-first communication.
The upper byte (bits 15 to 8) is first transmitted when
CRCDOR contents (CRC code) are divided into two
bytes to be transmitted in two parts.
1
0
G1
G0
0
0
R/W
R/W
CRC Generating Polynomial Select
These bits select the polynomial.
00: Reserved
01: X
8
+ X
2
+ X + 1
10: X
16
+ X
15
+ X
2
+ 1
11: X
16
+ X
12
+ X
5
+ 1