Datasheet

Rev. 3.00 Sep. 28, 2009 Page xxix of xxxiv
REJ09B0384-0300
Tables
Section 1 Overview................................................................................................
Table 1.1 Pin Assignment in Each Operating Mode................................................................. 5
Table 1.2 Pin Functions ............................................................................................................ 9
Section 2 CPU........................................................................................................
Table 2.1 Instruction Classification ........................................................................................ 29
Table 2.2 Operation Notation ................................................................................................. 30
Table 2.3 Data Transfer Instructions....................................................................................... 31
Table 2.4 Arithmetic Operations Instructions (1) ................................................................... 32
Table 2.4 Arithmetic Operations Instructions (2) ................................................................... 33
Table 2.5 Logic Operations Instructions................................................................................. 34
Table 2.6 Shift Instructions..................................................................................................... 34
Table 2.7 Bit Manipulation Instructions (1)............................................................................ 35
Table 2.7 Bit Manipulation Instructions (2)............................................................................ 36
Table 2.8 Branch Instructions................................................................................................. 37
Table 2.9 System Control Instructions.................................................................................... 38
Table 2.10 Block Data Transfer Instructions............................................................................ 39
Table 2.11 Addressing Modes .................................................................................................. 41
Table 2.12 Absolute Address Access Ranges........................................................................... 43
Table 2.13 Effective Address Calculation (1)........................................................................... 45
Table 2.13 Effective Address Calculation (2)........................................................................... 46
Section 3 MCU Operating Modes
Table 3.1 MCU Operating Mode Selection ............................................................................ 51
Section 4 Exception Handling
Table 4.1 Exception Types and Priority.................................................................................. 57
Table 4.2 Exception Handling Vector Table........................................................................... 58
Table 4.3 Status of CCR after Trap Instruction Exception Handling ..................................... 62
Section 5 Interrupt Controller
Table 5.1 Pin Configuration.................................................................................................... 66
Table 5.2 Correspondence between Interrupt Source and ICR............................................... 68
Table 5.3 Interrupt Sources, Vector Addresses, and Interrupt Priorities................................. 76
Table 5.4 Interrupt Control Modes ......................................................................................... 78
Table 5.5 Interrupts Selected in Each Interrupt Control Mode............................................... 79