Datasheet

Section 13 Serial Communication Interface (SCI)
Rev. 3.00 Sep. 28, 2009 Page 261 of 710
REJ09B0384-0300
• Bit Functions in Smart Card Interface Mode (when SMIF in SCMR = 1)
Bit Bit Name
Initial
Value R/W Description
7 TIE 0 R/W Transmit Interrupt Enable
When this bit is set to 1,a TXI interrupt request is enabled.
6 RIE 0 R/W Receive Interrupt Enable
When this bit is set to 1, RXI and ERI interrupt requests are
enabled.
5 TE 0 R/W Transmit Enable
When this bit is set to 1, transmission is enabled.
4 RE 0 R/W Receive Enable
When this bit is set to 1, reception is enabled.
3 MPIE 0 R/W Multiprocessor Interrupt Enable (enabled only when the MP
bit in SMR is 1 in asynchronous mode)
Write 0 to this bit in smart card interface mode.
2 TEIE 0 R/W Transmit End Interrupt Enable
Write 0 to this bit in smart card interface mode.
1
0
CKE1
CKE0
0
0
R/W
R/W
Clock Enable 1 and 0
These bits control the clock output from the SCK pin. In
GSM mode, clock output can be dynamically switched. For
details, see section 13.7.8, Clock Output Control.
When GM in SMR = 0
00: Output disabled (SCK pin functions as I/O port.)
01: Clock output
1x: Reserved
When GM in SMR = 1
00: Output fixed to low
01: Clock output
10: Output fixed to high
11: Clock output
[Legend]
x: Don't care.