Datasheet

Section 10 16-Bit Free-Running Timer (FRT)
Rev. 3.00 Sep. 28, 2009 Page 197 of 710
REJ09B0384-0300
10.2.4 Timer Interrupt Enable Register (TIER)
TIER enables and disables interrupt requests.
Bit Bit Name
Initial
Value
R/W Description
7 to 4 ⎯ All 0 R Reserved
These bits are always read as 0 and cannot be modified.
3 OCIAE 0 R/W Output Compare Interrupt A Enable
Selects whether to enable output compare interrupt A
request (OCIA) when output compare flag A (OCFA) in
TCSR is set to 1.
0: OCIA requested by OCFA is disabled
1: OCIA requested by OCFA is enabled
2 OCIBE 0 R/W Output Compare Interrupt B Enable
Selects whether to enable output compare interrupt B
request (OCIB) when output compare flag B (OCFB) in
TCSR is set to 1.
0: OCIB requested by OCFB is disabled
1: OCIB requested by OCFB is enabled
1 OVIE 0 R/W Timer Overflow Interrupt Enable
Selects whether to enable a free-running timer overflow
request interrupt (FOVI) when the timer overflow flag
(OVF) in TCSR is set to 1.
0: FOVI requested by OVF is disabled
1: FOVI requested by OVF is enabled
0 ⎯ 0 R Reserved
This bit is always read as 0 and cannot be modified.