Datasheet

Section 9 14-Bit PWM Timer (PWMX)
Rev. 3.00 Sep. 28, 2009 Page 186 of 710
REJ09B0384-0300
Table 9.3 Settings and Operation (Examples when φ = 25 MHz)
PCSR Fixed DADR Bits
PWCKX0
PWCKX1
Bit Data
C B A CKS
Reso-
lution
T
(μs)
CFS
Base
Cycle
Conver-
sion
Cycle
TL/TH
(OS = 0/OS = 1)
Accuracy
(Bits)
DA3 DA2 DA1 DA0
Conversion
Cycle*
⎯ ⎯ ⎯ 0 0.04 0 14 655.36 μs
12 0 0 163.84 μs
2.56 μs/
390.6 kHz
655.36 μs Always low/high output
DA13 to 0 = H'0000 to H'00FF
(Data value) × T
DA13 to 0 = H'0100 to H'3FFF
10 0 0 0 0 40.96 μs
1 14 655.36 μs
12 0 0 163.84 μs
(φ)
10.24 μs/
97.7 kHz
655.36 μs Always low/high output
DA13 to 0 = H'0000 to H'003F
(Data value) × T
DA13 to 0 = H'0040 to H'3FFF
10 0 0 0 0 40.96 μs
0 0 0 1 0.08 0 14 1.311 ms
12 0 0 0.328 ms
5.12 μs/
195.3 kHz
1.311ms Always low/high output
DA13 to 0 = H'0000 to H'00FF
(Data value) × T
DA13 to 0 = H'0100 to H'3FFF
10 0 0 0 0 0.082 ms
1 14 1.311 ms
12 0 0 0.328 ms
(φ/2)
20.48 μs/
48.8 kHz
1.311 ms Always low/high output
DA13 to 0 = H'0000 to H'003F
(Data value) × T
DA13 to 0 = H'0040 to H'3FFF
10 0 0 0 0 0.082 ms
0 0 1 1 2.56 0 14 41.943 ms
12 0 0 10.486 ms
163.8 μs/
6.1 kHz
41.943 ms Always low/high output
DA13 to 0 = H'0000 to H'00FF
(Data value) × T
DA13 to 0 = H'0100 to H'3FFF
10 0 0 0 0 2.621 ms
1 14 41.943 ms
12 0 0 10.486 ms
(φ/64)
655.4 μs/
1.5 kHz
41.943 ms Always low/high output
DA13 to 0 = H'0000 to H'003F
(Data value) × T
DA13 to 0 = H'0040 to H'3FFF
10 0 0 0 0 2.621 ms
0 1 0 1 5.12 0 14 83.886 ms
12 0 0 20.972 ms
327.7 μs/
3.1 kHz
83.886 ms Always low/high output
DA13 to 0 = H'0000 to H'00FF
(Data value) × T
DA13 to 0 = H'0100 to H'3FFF
10 0 0 0 0 5.243 ms
1 14 83.886 ms
12 0 0 20.972 ms
(φ/128)
1310.7 μs/
0.8 kHz
83.886 ms Always low/high output
DA13 to 0 = H'0000 to H'003F
(Data value) × T
DA13 to 0 = H'0040 to H'3FFF
10 0 0 0 0 5.243 ms