Datasheet

Section 9 14-Bit PWM Timer (PWMX)
Rev. 3.00 Sep. 28, 2009 Page 185 of 710
REJ09B0384-0300
9.5 Operation
A PWM waveform like the one shown in figure 9.2 is output from the PWX pin. DA13 to DA0 in
DADR corresponds to the total width (T
L
) of the low (0) pulses output in one conversion cycle
(256 pulses when CFS = 0, 64 pulses when CFS = 1). When OS = 0, this waveform is directly
output. When OS = 1, the output waveform is inverted, and DA13 to DA0 in DADR value
corresponds to the total width (T
H
) of the high (1) output pulses. Figures 9.3 and 9.4 show the
types of waveform output available.
t
f
t
L
T: Resolution
T
L
= Σ t
Ln
(OS = 0)
(When CFS = 0, m = 256
When CFS = 1, m = 64)
m
n = 1
1 conversion cycle
(T × 2
14
(= 16384))
Base cycle
(T × 64 or T × 256)
Figure 9.2 PWMX (D/A) Operation
Table 9.3 summarizes the relationships between the CKS and CFS bit settings and the resolution,
base cycle, and conversion cycle. The PWM output remains fixed unless DA13 to DA0 in DADR
contain at least a certain minimum value. The relationship between the OS bit and the output
waveform is shown in figures 9.3 and 9.4.