Datasheet

Section 8 I/O Ports
Rev. 3.00 Sep. 28, 2009 Page 174 of 710
REJ09B0384-0300
• PE1/LAD1
The pin function is switched as shown below according to the LPC enabled/disabled and the
PE1DDR bit.
LPC Disabled Enabled
PE1DDR 0 1 x
Pin function PE1 input pin PE1 output pin LAD1 input/output pin
[Legend]
x: Don't care
• PE0/LAD0
The pin function is switched as shown below according to the LPC enabled/disabled and the
PE0DDR bit.
LPC Disabled Enabled
PE0DDR 0 1 x
Pin function PE0 input pin PE0 output pin LAD0 input/output pin
[Legend]
x: Don't care