Datasheet

Section 8 I/O Ports
Rev. 3.00 Sep. 28, 2009 Page 171 of 710
REJ09B0384-0300
8.11.2 Port E Output Data Register (PEODR)
PEODR stores output data for the port E pins.
Bit Bit Name Initial Value R/W Description
7 PE7ODR 0 R/W
6 PE6ODR 0 R/W
5 PE5ODR 0 R/W
4 PE4ODR 0 R/W
3 PE3ODR 0 R/W
2 PE2ODR 0 R/W
1 PE1ODR 0 R/W
The PEODR register stores the output data for the
pins that are used a general output port.
0 PE0ODR 0 R/W
8.11.3 Port E Input Data Register (PEPIN)
PEPIN indicates the pin states of port E.
Bit Bit Name Initial Value R/W Description
7 PE7PIN Undefined* R
6 PE6PIN Undefined* R
5 PE5PIN Undefined* R
4 PE4PIN Undefined* R
3 PE3PIN Undefined* R
2 PE2PIN Undefined* R
1 PE1PIN Undefined* R
Pin states can be read by performing a read cycle on
this register.
This register is assigned to the same address as that
of PEDDR. When this register is written to, data is
written to PEDDR and the port E setting is then
changed.
0 PE0PIN Undefined* R
Note: * The initial value of these pins is determined in accordance with the state of pins PE7 to
PE0.