Datasheet

Section 8 I/O Ports
Rev. 3.00 Sep. 28, 2009 Page 157 of 710
REJ09B0384-0300
8.8.2 Port 8 Data Register (P8DR)
P8DR stores output data for the port 8 pins.
Bit Bit Name Initial Value R/W Description
7 P87DR 0 R/W
6 P86DR 0 R/W
5 P85DR 0 R/W
4 P84DR 0 R/W
3 P83DR 0 R/W
2 P82DR 0 R/W
1 P81DR 0 R/W
P8DR stores output data for the port 8 pins that are
used as the general output port.
If a port 8 read is performed while the P8DDR bits are
set to 1, the P8DR values are read. If a port 8 read is
performed while the P8DDR bits are cleared to 0, the
pin states are read.
0 P80DR 0 R/W
8.8.3 Pin Functions
The relationship between register setting values and pin functions are as follows.
• P87/ExIRQ15/TxD3/ADTRG
The pin function is switched as shown below according to the combination of the TE bit in
SCR of SCI_3, the SMIF bit in SCMR, and the P87DDR bit.
When the TRGS1 and EXTRGS bits are both set to 1 and the TRGS0 bit is cleared to 0 in
ADCR of the A/D converter, this pin can be used as the ADTRG input pin.
When the ISS15 bit in ISSR16 is set to 1, this pin can be used as the ExIRQ15 input pin. To
use this pin as the ExIRQ15 input pin, clear the P87DDR bit to 0.
P87DDR 0 1
SMIF 0 1 0 1 0
TE 0 x 0 x 1
P87 input pin Pin function
ExIRQ15 input pin/
ADTRG input pin
P87 input pin TxD3 output pin
[Legend]
x: Don't care