Datasheet

Section 8 I/O Ports
Rev. 3.00 Sep. 28, 2009 Page 144 of 710
REJ09B0384-0300
8.5.2 Port 5 Data Register (P5DR)
P5DR stores output data for the port 5 pins.
Bit Bit Name Initial Value R/W Description
7 P57DR 0 R/W
6 P56DR Undefined* R
P5DR stores output data for the port 5 pins that are
used as the general output port.
If a port 5 read is performed while the P5DDR bits are
set to 1, the P5DR values are read. If a port 5 read is
performed while the P5DDR bits are cleared to 0, the
pin states are read.
5, 4 ⎯ All 0 R/W Reserved
3 P53DR 0 R/W
2 P52DR 0 R/W
See the description of bits 7 and 6.
1, 0 ⎯ All 0 R/W Reserved
Note: * The initial value is determined in accordance with the pin state of P56.
8.5.3 Pin Functions
The relationship between register setting values and pin functions are as follows.
• P57/IRQ15/PWX1
The pin function is switched as shown below according to the combination of the OEB bit in
DACR of PWMX and the P57DDR bit.
When the ISS15 bit in ISSR16 is cleared to 0 and the IRQ15E bit in IER16 of the interrupt
controller is set to 1, this pin can be used as the IRQ15 input pin. To use this pin as the IRQ15
input pin, clear the P57DDR bit to 0.
OEB 0 1
P57DDR 0 1 x
P57 input pin Pin function
IRQ15 input pin
P57 output pin PWX1 output pin
[Legend]
x: Don't care