Datasheet

Rev. 3.00 Sep. 28, 2009 Page xvi of xxxiv
REJ09B0384-0300
15.3.8 I
2
C Bus Extended Control Register (ICXR).......................................................... 353
15.3.9 I
2
C SMBus Control Register (ICSMBCR)............................................................ 357
15.4 Operation ........................................................................................................................... 359
15.4.1 I
2
C Bus Data Format ............................................................................................. 359
15.4.2 Initialization.......................................................................................................... 361
15.4.3 Master Transmit Operation................................................................................... 361
15.4.4 Master Receive Operation .................................................................................... 365
15.4.5 Slave Receive Operation....................................................................................... 373
15.4.6 Slave Transmit Operation ..................................................................................... 381
15.4.7 IRIC Setting Timing and SCL Control ................................................................. 384
15.4.8 Operation Using the DTC ..................................................................................... 387
15.4.9 Noise Canceler...................................................................................................... 389
15.4.10 Initialization of Internal State ............................................................................... 389
15.5 Interrupt Source ................................................................................................................. 391
15.6 Usage Notes ....................................................................................................................... 392
Section 16 LPC Interface (LPC)........................................................................ 405
16.1 Features.............................................................................................................................. 405
16.2 Input/Output Pins............................................................................................................... 407
16.3 Register Descriptions......................................................................................................... 408
16.3.1 Host Interface Control Registers 0 and 1 (HICR0 and HICR1)............................ 410
16.3.2 Host Interface Control Registers 2 and 3 (HICR2 and HICR3)............................ 415
16.3.3 Host Interface Control Register 4 (HICR4) .......................................................... 418
16.3.4 LPC Channel 1, 2 Address Register H, L (LADR12H, LADR12L)..................... 419
16.3.5 LPC Channel 3 Address Register H, L (LADR3H, LADR3L)............................. 421
16.3.6 Input Data Registers 1 to 3 (IDR1 to IDR3) ......................................................... 424
16.3.7 Output Data Registers 0 to 3 (ODR1 to ODR3) ................................................... 424
16.3.8 Bidirectional Data Registers 0 to 15 (TWR0 to TWR15)..................................... 425
16.3.9 Status Registers 1 to 3 (STR1 to STR3) ............................................................... 426
16.3.10 SERIRQ Control Register 0 (SIRQCR0).............................................................. 434
16.3.11 SERIRQ Control Register 1 (SIRQCR1).............................................................. 438
16.3.12 SERIRQ Control Register 2 (SIRQCR2).............................................................. 442
16.3.13 SERIRQ Control Register 4 (SIRQCR4).............................................................. 443
16.3.14 SERIRQ Control Register 5 (SIRQCR5).............................................................. 444
16.3.15 Host Interface Select Register (HISEL)................................................................ 445
16.3.16 SMIC Flag Register (SMICFLG) ......................................................................... 446
16.3.17 SMIC Control Status Register (SMICCSR).......................................................... 447
16.3.18 SMIC Data Register (SMICDTR) ........................................................................ 447
16.3.19 SMIC Interrupt Register 0 (SMICIR0) ................................................................. 448
16.3.20 SMIC Interrupt Register 1 (SMICIR1) ................................................................. 450