Datasheet

Section 8 I/O Ports
Rev. 3.00 Sep. 28, 2009 Page 143 of 710
REJ09B0384-0300
8.5 Port 5
Port 5 is a 4-bit I/O port. Port 5 pins also function as interrupt input, PWMX output, and SCI_1
input/output. Port 5 has the following registers.
• Port 5 data direction register (P5DDR)
• Port 5 data register (P5DR)
8.5.1 Port 5 Data Direction Register (P5DDR)
The individual bits of P5DDR specify input or output for the pins of port 5.
Bit Bit Name Initial Value R/W Description
7 P57DDR 0 W If port 5 pins are specified for use as the general I/O
port, the corresponding port 5 pins function as output
port when the P5DDR bits are set to 1, and as input
port when cleared to 0.
6 P56DDR 0 W The corresponding port 5 pin functions as the system
clock output pin (φ) when this bit is set to 1, and as
the general I/O port when cleared to 0.
5, 4 ⎯ All 0 W Reserved
3 P53DDR 0 W
2 P52DDR 0 W
If port 5 pins are specified for use as the general I/O
port, the corresponding port 5 pins function as output
port when the P5DDR bits are set to 1, and as input
port when cleared to 0.
1, 0 ⎯ All 0 W Reserved