Datasheet

Section 8 I/O Ports
Rev. 3.00 Sep. 28, 2009 Page 138 of 710
REJ09B0384-0300
8.4.2 Port 4 Data Register (P4DR)
P4DR stores output data for the port 4 pins.
These bits are initialized only by a system reset, and retain their values even when an internal reset
signal is generated by the WDT.
Bit Bit Name Initial Value R/W Description
7 P47DR 0 R/W
6 P46DR 0 R/W
5 P45DR 0 R/W
4 P44DR 0 R/W
3 P43DR 0 R/W
2 P42DR 0 R/W
1 P41DR 0 R/W
P4DR stores output data for the port 4 pins that are
used as the general output port.
If a port 4 read is performed while the P4DDR bits are
set to 1, the P4DR values are read. If a port 4 read is
performed while the P4DDR bits are cleared to 0, the
pin states are read.
0 P40DR 0 R/W
8.4.3 Port 4 Pull-Up MOS Control Register (P4PCR)
P4PCR controls the port 4 built-in input pull-up MOSs.
Bit Bit Name Initial Value R/W Description
7 P47PCR 0 R/W
6 P46PCR 0 R/W
5 P45PCR 0 R/W
4 P44PCR 0 R/W
3 P43PCR 0 R/W
2 P42PCR 0 R/W
1 P41PCR 0 R/W
When the pins are in input state, the corresponding
input pull-up MOS is turned on when a P4PCR bit is set
to 1.
0 P40PCR 0 R/W