Datasheet

Rev. 3.00 Sep. 28, 2009 Page xv of xxxiv
REJ09B0384-0300
13.7.3 Block Transfer Mode ............................................................................................ 300
13.7.4 Receive Data Sampling Timing and Reception Margin........................................ 301
13.7.5 Initialization .......................................................................................................... 302
13.7.6 Serial Data Transmission (Except in Block Transfer Mode) ................................ 303
13.7.7 Serial Data Reception (Except in Block Transfer Mode)...................................... 306
13.7.8 Clock Output Control............................................................................................ 307
13.8 Interrupt Sources................................................................................................................ 309
13.8.1 Interrupts in Normal Serial Communication Interface Mode ............................... 309
13.8.2 Interrupts in Smart Card Interface Mode .............................................................. 310
13.9 Usage Notes ....................................................................................................................... 311
13.9.1 Module Stop Mode Setting ................................................................................... 311
13.9.2 Break Detection and Processing ........................................................................... 311
13.9.3 Mark State and Break Sending.............................................................................. 311
13.9.4 Receive Error Flags and Transmit Operations
(Clock Synchronous Mode Only) ......................................................................... 312
13.9.5 Relation between Writing to TDR and TDRE Flag .............................................. 312
13.9.6 Restrictions on Using DTC................................................................................... 312
13.9.7 SCI Operations during Mode Transitions ............................................................. 313
13.9.8 Notes on Switching from SCK Pins to Port Pins .................................................. 317
Section 14 CRC Operation Circuit (CRC).........................................................319
14.1 Features.............................................................................................................................. 319
14.2 Register Descriptions ......................................................................................................... 320
14.2.1 CRC Control Register (CRCCR) .......................................................................... 320
14.2.2 CRC Data Input Register (CRCDIR).................................................................... 321
14.2.3 CRC Data Output Register (CRCDOR)................................................................ 321
14.3 CRC Operation Circuit Operation...................................................................................... 321
14.4 Note on CRC Operation Circuit......................................................................................... 325
Section 15 I
2
C Bus Interface (IIC) .....................................................................327
15.1 Features.............................................................................................................................. 327
15.2 Input/Output Pins............................................................................................................... 330
15.3 Register Descriptions ......................................................................................................... 331
15.3.1 I
2
C Bus Data Register (ICDR) .............................................................................. 331
15.3.2 Slave Address Register (SAR).............................................................................. 332
15.3.3 Second Slave Address Register (SARX) .............................................................. 333
15.3.4 I
2
C Bus Mode Register (ICMR)............................................................................ 335
15.3.5 I
2
C Bus Transfer Rate Select Register (IICX3)..................................................... 337
15.3.6 I
2
C Bus Control Register (ICCR).......................................................................... 340
15.3.7 I
2
C Bus Status Register (ICSR)............................................................................. 349