Datasheet

Section 8 I/O Ports
Rev. 3.00 Sep. 28, 2009 Page 132 of 710
REJ09B0384-0300
8.3 Port 3
Port 3 is an 8-bit I/O port. Port 3 pins also function as de-bounce input. Port 3 has the following
registers.
• Port 3 data direction register (P3DDR)
• Port 3 data register (P3DR)
• Port 3 pull-up MOS control register (P3PCR)
• Noise canceler enable register (P3NCE)
• Noise canceler mode control register (P3NCMC)
• Noise cancel cycle setting register (NCCS)
8.3.1 Port 3 Data Direction Register (P3DDR)
The individual bits of P3DDR specify input or output for the pins of port 3.
Bit Bit Name Initial Value R/W Description
7 P37DDR 0 W
6 P36DDR 0 W
5 P35DDR 0 W
4 P34DDR 0 W
3 P33DDR 0 W
2 P32DDR 0 W
1 P31DDR 0 W
The corresponding port 3 pins function as output port
when the P3DDR bits are set to 1, and as input port
when cleared to 0.
0 P30DDR 0 W