Datasheet

Section 7 Data Transfer Controller (DTC)
Rev. 3.00 Sep. 28, 2009 Page 115 of 710
REJ09B0384-0300
7.6.3 Block Transfer Mode
In block transfer mode, one activation source transfers one block of data. Either the transfer source
or the transfer destination is designated as a block area. Table 7.7 lists the register functions in
block transfer mode. The block size can be between 1 and 256. When the transfer of one block
ends, the initial state of the block size counter and the address register that is specified as the block
area is restored. The other address register is then incremented, decremented, or left fixed
according to the register information. From 1 to 65,536 transfers can be specified. Once the
specified number of transfers has been completed, a CPU interrupt is requested.
Table 7.7 Register Functions in Block Transfer Mode
Name Abbreviation Function
DTC source address register SAR Transfer source address
DTC destination address register DAR Transfer destination address
DTC transfer count register AH CRAH Holds block size
DTC transfer count register AL CRAL Block size counter
DTC transfer count register B CRB Transfer counter
Transfer
SAR
or
DAR
DAR
or
SAR
Block area
•
•
•
1st block
N th block
Figure 7.8 Memory Mapping in Block Transfer Mode