Datasheet

Rev. 3.00 Sep. 28, 2009 Page xiii of xxxiv
REJ09B0384-0300
10.5.4 Switching of Internal Clock and FRC Operation.................................................. 208
Section 11 8-Bit Timer (TMR) ..........................................................................211
11.1 Features.............................................................................................................................. 211
11.2 Register Descriptions ......................................................................................................... 214
11.2.1 Timer Counter (TCNT)......................................................................................... 214
11.2.2 Time Constant Register A (TCORA).................................................................... 215
11.2.3 Time Constant Register B (TCORB) .................................................................... 215
11.2.4 Timer Control Register (TCR).............................................................................. 216
11.2.5 Timer Control/Status Register (TCSR)................................................................. 219
11.2.6 Timer Connection Register S (TCONRS)............................................................. 223
11.3 Operation Timing............................................................................................................... 224
11.3.1 TCNT Count Timing............................................................................................. 224
11.3.2 Timing of CMFA and CMFB Setting at Compare-Match .................................... 225
11.3.3 Timing of Counter Clear at Compare-Match........................................................ 225
11.3.4 Timing of Overflow Flag (OVF) Setting .............................................................. 226
11.4 TMR_0 and TMR_1 Cascaded Connection....................................................................... 227
11.4.1 16-Bit Count Mode ............................................................................................... 227
11.4.2 Compare-Match Count Mode ............................................................................... 227
11.5 Interrupt Sources................................................................................................................ 228
11.6 Usage Notes ....................................................................................................................... 229
11.6.1 Conflict between TCNT Write and Counter Clear................................................ 229
11.6.2 Conflict between TCNT Write and Increment...................................................... 230
11.6.3 Conflict between TCOR Write and Compare-Match............................................ 231
11.6.4 Switching of Internal Clocks and TCNT Operation.............................................. 232
11.6.5 Mode Setting with Cascaded Connection ............................................................. 234
Section 12 Watchdog Timer (WDT)..................................................................235
12.1 Features.............................................................................................................................. 235
12.2 Input/Output Pins............................................................................................................... 237
12.3 Register Descriptions ......................................................................................................... 237
12.3.1 Timer Counter (TCNT)......................................................................................... 237
12.3.2 Timer Control/Status Register (TCSR)................................................................. 238
12.4 Operation ........................................................................................................................... 242
12.4.1 Watchdog Timer Mode......................................................................................... 242
12.4.2 Interval Timer Mode............................................................................................. 243
12.4.3 RESO Signal Output Timing ................................................................................ 245
12.5 Interrupt Sources................................................................................................................ 246
12.6 Usage Notes ....................................................................................................................... 247
12.6.1 Notes on Register Access...................................................................................... 247