Datasheet

Section 7 Data Transfer Controller (DTC)
Rev. 3.00 Sep. 28, 2009 Page 111 of 710
REJ09B0384-0300
Chain transfer
DTC vector
address
Register information
Register information
start address
Figure 7.4 Correspondence between DTC Vector Address and Register Information
Table 7.4 Interrupt Sources, DTC Vector Addresses, and Corresponding DTCEs
Activation
Source Origin Activation Source
Vector
Number
DTC Vector
Address DTCE* Priority
Software Write to DTVECR DTVECR H'0400 + (vector
number x 2)
⎯
High
External pins IRQ0 16 H'0420 DTCEA7
IRQ1 17 H'0422 DTCEA6
IRQ2 18 H'0424 DTCEA5
IRQ3 19 H'0426 DTCEA4
A/D converter ADI 28 H'0438 DTCEA3
EVC EVENTI 29 H'043A DTCEC4
IIC_2 IICI2 76 H'0498 DTCEB6
IIC_3 IICI3 78 H'049C DTCED4
SCI_3 RXI3 81 H'04A2 DTCEC2
TXI3 82 H'04A4 DTCEC1
SCI_1 RXI1 85 H'04AA DTCEC0
TXI1 86 H'04AC DTCED7
IIC_0 IICI0 94 H'04BC DTCEB5
IIC_1 IICI1 98 H'04C4 DTCED3
LPC ERRI 104 H'04D0 DTCEE3
IBFI1 105 H'04D2 DTCEE2
IBFI2 106 H'04D4 DTCEE1
IBFI3 107 H'04D6 DTCEE0 Low
Note: * DTCE bits with no corresponding interrupt are reserved, and the write value should
always be 0.