Datasheet

Section 7 Data Transfer Controller (DTC)
Rev. 3.00 Sep. 28, 2009 Page 102 of 710
REJ09B0384-0300
7.2.5 DTC Transfer Count Register A (CRA)
CRA is a 16-bit register that designates the number of times data is to be transferred by the DTC.
In normal transfer mode, the entire CRA functions as a 16-bit transfer counter (1 to 65536). It is
decremented by 1 every time data is transferred, and transfer ends when the count reaches H'0000.
The number of times data is transferred is one when the setting value of CRA is H'0001, 65,535
when the setting value is H'FFFF, and 65,536 when the setting value is H'0000.
In repeat transfer mode CRA is divided in two, with the highest eight bits designated as CRAH
and the lowest eight bits as CRAL. CRAH holds the value for the number of data transfers, and
CRAL functions as an 8-bit transfer counter (1 to 256). CRAL is decremented by 1 every time
data is transferred, and the contents of CRAH are transferred when the counter value reaches H'00.
The number of times data is transferred is one when CRAH = CRAL = H'01, 255 when CRAH =
CRAL = H'FF, and 256 when CRAH = CRAL = H'00.
In block transfer mode CRA is divided in two, with the highest eight bits designated as CRAH and
the lowest eight bits as CRAL. CRAH holds the value for the block size, and CRAL functions as
an 8-bit block size counter (1 to 256). CRAL is decremented by 1 every time data is transferred,
and the contents of CRAH are transferred when the counter value reaches H'00. The block size is
one byte (or one word) when CRAH = CRAL = H'01, 255 bytes (or 255 words) when CRAH =
CRAL = H'FF, and 256 bytes (or 256 words) when CRAH = CRAL = H'00.
7.2.6 DTC Transfer Count Register B (CRB)
CRB is a 16-bit register that designates the number of times data is to be transferred by the DTC in
block transfer mode. It functions as a 16-bit transfer counter (1 to 65536) that is decremented by 1
every time data is transferred, and transfer ends when the count reaches H'0000.