Datasheet

Section 24 A/D Converter
Page 816 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
+
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
ADTRG1
AVcc
AVss
ADDR0/CMPR
ADDR1/CMPCSR
ADDR2/CMPVALH
ADDR3/CMPVALL
ADDR4 ADDR5 ADDR6 ADDR7
ADMR
ADCSR
ADCR
AAZB
Module data bus
Internal data bus
Bus interface
Control circuit
CMPI interrupt signal
ADI interrupt signal
Conversion start trigger from timer RC or RD
10-bit D/A
Multiplexer
Successive approximations register
Comparator
Sample-and-hold circuit
Figure 24.1 Block Diagram of A/D Converter (Unit 1)