Datasheet

Section 22 Synchronous Serial Communication Unit (SSU)
Page 798 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
22.4 Interrupt Requests
The SSU has five interrupt requests: transmit data empty, transmit end, receive data full, overrun
error, and conflict error. Since these interrupt requests are assigned to the common vector address,
interrupt sources must be determined by flags. Table 22.3 lists the interrupt requests.
Table 22.3 Interrupt Requests
Interrupt Request Abbreviation Interrupt Condition DTC Activation
Transmit data empty TXI (TIE = 1), (TDRE = 1) Possible
Transmit end TEI (TEIE = 1), (TEND = 1) Impossible
Receive data full RXI (RIE = 1), (RDRF = 1) Possible
Overrun error OEI (RIE = 1), (ORER = 1) Impossible
Conflict error CEI (CEIE = 1), (CE = 1) Impossible
When an interrupt exception handling by an interrupt source shown in table 22.4 is executed, each
interrupt source must be cleared during the exception handling. Note that the TDRE and TEND
bits are automatically cleared by writing transmit data in SSTDR and the RDRF bit is
automatically cleared by reading SSRDR. When transmit data is written in SSTDR, the TDRE bit
is set again at the same time. Then if the TDRE bit is cleared, additional one byte of data may be
transmitted. The DTC can be activated by a TXI interrupt to transfer data. The TDRE flag is
automatically cleared upon data transfer by the DTC. The DTC can also be activated by an RXI
interrupt to transfer data. The RDRF flag is automatically cleared upon data transfer by the DTC.
22.5 Usage Notes
(1) If the NMOS open-drain output is selected for the SSCK output pin, the SSO output pin, and
the SCS output pin, use the PMC to allocate that pin from port 5. If the pins are allocated
from a port other than port 5, only the CMOS output is available.