Datasheet

Section 21 I
2
C Bus Interface 2 (IIC2)
Page 734 of 982 REJ09B0465-0300 Rev. 3.00
Sep 17, 2010
H8S/20103, H8S/20203, H8S/20223, H8S/20115, H8S/20215, H8S/20235 Group
• CKS[3:0] bits (transfer clock select 3 to 0)
These bits should be set according to the necessary transfer rate (see table 21.2) in master
mode. In slave mode, these bits are used for reservation of the data setup time in transmit
mode. The time is 10 t
cyc
when CKS3 = 0 and 20 t
cyc
when CKS3 = 1.
Table 21.2 Transfer Rate
Bit 3 Bit 2 Bit 1 Bit 0
Transfer Rate
CKS3 CKS2 CKS1 CKS0
Clock
φ = 5 MHz φ = 8 MHz φ = 10 MHz φ = 16 MHz φ = 20 MHz
0 0 0 0 φ/28 179 kHz 286 kHz 357 kHz 571 kHz 714 kHz
1 φ/40 125 kHz 200 kHz 250 kHz 400 kHz 500 kHz
1 0 φ/48 104 kHz 167 kHz 208 kHz 333 kHz 417 kHz
1 φ/64 78.1 kHz 125 kHz 156 kHz 250 kHz 313 kHz
1 0 0 φ/80 62.5 kHz 100 kHz 125 kHz 200 kHz 250 kHz
1 φ/100 50.0 kHz 80.0 kHz 100 kHz 160 kHz 200 kHz
1 0 φ/112 44.6 kHz 71.4 kHz 89.3 kHz 143 kHz 179 kHz
1 φ/128 39.1 kHz 62.5 kHz 78.1 kHz 125 kHz 156 kHz
1 0 0 0 φ/56 89.3 kHz 143 kHz 179 kHz 286 kHz 357 kHz
1 φ/80 62.5 kHz 100 kHz 125 kHz 200 kHz 250 kHz
1 0 φ/96 52.1 kHz 83.3 kHz 104 kHz 167 kHz 208 kHz
1 φ/128 39.1 kHz 62.5 kHz 78.1 kHz 125 kHz 156 kHz
1 0 0 φ/160 31.3 kHz 50.0 kHz 62.5 kHz 100 kHz 125 kHz
1 φ/200 25.0 kHz 40.0 kHz 50.0 kHz 80.0 kHz 100 kHz
1 0 φ/224 22.3 kHz 35.7 kHz 44.6 kHz 71.4 kHz 89.3 kHz
1 φ/256 19.5 kHz 31.3 kHz 39.1 kHz 62.5 kHz 78.1 kHz